The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2016
Filed:
Apr. 08, 2015
Applicant:
Sony Corporation, Tokyo, JP;
Inventors:
Hiroyuki Iwaki, Kanagawa, JP;
Hirotaka Murakami, Kanagawa, JP;
Yoshiaki Inada, Tokyo, JP;
Yasuaki Hisamatsu, Kanagawa, JP;
Assignee:
SONY CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/00 (2006.01); H04N 5/357 (2011.01); H01L 27/146 (2006.01); H03M 1/06 (2006.01); H04N 5/376 (2011.01); H04N 5/378 (2011.01); H04N 5/374 (2011.01); H03M 1/12 (2006.01); H03M 1/14 (2006.01); H03M 1/56 (2006.01);
U.S. Cl.
CPC ...
H04N 5/357 (2013.01); H01L 27/14609 (2013.01); H03M 1/0624 (2013.01); H04N 5/378 (2013.01); H04N 5/3742 (2013.01); H04N 5/3765 (2013.01); H03M 1/123 (2013.01); H03M 1/14 (2013.01); H03M 1/56 (2013.01);
Abstract
A solid-state imaging device having an analog-digital converter, and an analog-digital conversion method are described herein. An example of a solid-state imaging device comprises a bit inconsistency prevention section configured to prevent bit inconsistency between output of a low-level bit latch section and a high-level bit counting section.
Iwaki, Hiroyuki. (2016). A/d converter, a/d conversion method, solid-state imaging element and camera system (U.S. Patent No. 9363452). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9363452
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile