The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2016

Filed:

Aug. 02, 2013
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Thomas Kern, Munich, DE;

Michael Goessel, Mahlow, DE;

Christian Badack, Potsdam, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 13/15 (2006.01); G06F 11/08 (2006.01); H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
H03M 13/15 (2013.01); G06F 11/08 (2013.01); H03M 13/152 (2013.01); H03M 13/1575 (2013.01); H03M 13/6575 (2013.01);
Abstract

A circuitry for error correction includes a plurality of subcircuits for determining intermediate values Zw, Zw, Zw, Zwto be used as coefficients in an error correction expression (z, z, . . . , z)=Zw·α+Zw·α+Zw·α+Zw. The intermediate values Zw, Zw, Zw, Zware determined depending on subsyndromes s, s, sso that in case of a 1-bit, 2-bit, or 3-bit error z=(z, z, . . . , z)=(0, 0, . . . , 0) when an error occurred in the bit position i, and z=(z, z, . . . , z)≠(0, 0, . . . , 0) when no error occurred in the bit position i. A correction value Δv=for the bit position i may then be determined on the basis of the error correction expression evaluated for α.


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