The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2016
Filed:
Aug. 13, 2013
University of South Australia, Adelaide, South Australia, AU;
Ying Chen, Adelaide, AU;
Andre Pollok, Adelaide, AU;
David Victor Lawrie Haley, Adelaide, AU;
Linda Mary Davis, Adelaide, AU;
Mark Damian McDonnell, Adelaide, AU;
University of South Australia, Adelaide, ZA;
Abstract
Parallel analog to digital converted (ADC) architectures that can be used to replace single path ADC architectures. The parallel ADC architecture can comprise N branches and one ADC per branch. These ADCs can be identical. However each branch can have a different path adjustments applied to the ADC. The path adjustments can be biases and/or gains and each ADC receives a different combination of biases and/or gain to generate multiple adjusted input signals. These are then combined to generate a quantized output signal. Using these parallel architectures a range of weighting and offset combining schemes can be employed to achieve improvements in signal to noise ratio and to reduce the impact of clipping as compared to a single path ADC architecture.