The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2016
Filed:
Jul. 07, 2014
Applicant:
Altera Corporation, San Jose, CA (US);
Inventors:
Randy R. Huang, Morgan Hill, CA (US);
Martin Voogel, Los Altos, CA (US);
Jingcao Hu, Sunnyvale, CA (US);
Steven Teig, Menlo Park, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H03K 19/00 (2006.01); H03K 19/177 (2006.01); H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0008 (2013.01); G06F 17/50 (2013.01); G06F 17/5054 (2013.01); G06F 17/5081 (2013.01); H03K 19/1737 (2013.01); H03K 19/17748 (2013.01); H03K 19/17756 (2013.01); H03K 19/17784 (2013.01); H03K 19/17796 (2013.01); G06F 17/5072 (2013.01); G06F 17/5077 (2013.01); G06F 2217/78 (2013.01);
Abstract
A system and method for reducing power consumption in a reconfigurable integrated circuit. Some embodiments provide placement and routing programs that reduce the number of bits to be reconfigured. Some embodiments provide placement and routing programs that increase the number of groups of circuits that do not need reconfiguration at some times. Some embodiments include circuits that selectively block reconfiguration.