The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2016
Filed:
Mar. 14, 2013
Applicant:
Fuji Electric Co., Ltd., Kawasaki-shi, Kanagawa, JP;
Inventors:
Assignee:
FUJI ELECTRIC CO., LTD., Kawasaki-shi, JP;
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01); H01L 29/739 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 21/02 (2006.01); H01L 21/04 (2006.01); H01L 29/04 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7802 (2013.01); H01L 21/02529 (2013.01); H01L 21/046 (2013.01); H01L 29/045 (2013.01); H01L 29/0696 (2013.01); H01L 29/1095 (2013.01); H01L 29/1608 (2013.01); H01L 29/66068 (2013.01); H01L 29/66333 (2013.01); H01L 29/66712 (2013.01); H01L 29/7395 (2013.01);
Abstract
To provide a vertical SIC-MOSFET and IGBT capable of having low ON-resistance without destruction of gate oxide films or degradation of reliability even when a high voltage is applied, and a fabrication method thereof, a vertical mosfet has a semiconductor layer and a base layer joined instead of a well regionso as to include, as a joining portion, a point that is farthest and equidistant from centers of all the source regions facing each other and that is closest and equidistant from end portions farthest from the centers of the source regions in a planar view.