The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2016

Filed:

Sep. 20, 2012
Applicant:

Hitachi, Ltd., Chiyoda-ku, Tokyo, JP;

Inventors:

Nobuhiro Shiramizu, Tokyo, JP;

Satoru Hanzawa, Tokyo, JP;

Akira Kotabe, Tokyo, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); H01L 27/24 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0061 (2013.01); G11C 13/003 (2013.01); G11C 13/0004 (2013.01); H01L 27/249 (2013.01); H01L 27/2454 (2013.01); G11C 2013/0071 (2013.01); G11C 2213/71 (2013.01); G11C 2213/75 (2013.01); G11C 2213/79 (2013.01); H01L 45/06 (2013.01); H01L 45/1233 (2013.01); H01L 45/144 (2013.01);
Abstract

The invention is provided to suppress a current supplied to a storage element so as not to vary for each layer in a semiconductor memory device obtained by connecting a plurality of memory cells in series. A semiconductor memory device according to the invention includes a plurality of memory cells connected in series between a first signal line and a second signal line, and supplies a different gate voltage to at least two of selection transistors included in the memory cells, respectively (refer to FIG.).


Find Patent Forward Citations

Loading…