Systems and methods for synchronizing microprocessors while ensuring cross-processor state and data integrity

Abstract

Systems () and methods () for synchronizing operations of processors (). The methods involve: receiving by an electronic circuit () a first request () from a first processor for writing first data () to or reading first data from a first address () in a first data store (), and subsequently a second request () from a second processor for writing second data () to or reading second data from a second address () in a second data store (); comparing values of the first and second addresses to each other and values of the first and second data to each other; and concurrently communicating an asynchronous ready signal () from the electronic circuit to the processors when the values of the addresses and data respectively match each other. The asynchronous ready signal causes operations of the processors to be synchronized in time with each other.