The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2016

Filed:

Mar. 22, 2013
Applicant:

Sharp Kabushiki Kaisha, Osaka-shi, Osaka, JP;

Inventors:

Akane Sugisaka, Osaka, JP;

Akihiro Shohraku, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1345 (2006.01); G02F 1/1362 (2006.01); G02F 1/1339 (2006.01); G02F 1/1343 (2006.01); G02F 1/1335 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13452 (2013.01); G02F 1/1345 (2013.01); G02F 1/134336 (2013.01); G02F 1/136209 (2013.01); G02F 1/136286 (2013.01); G02F 1/1339 (2013.01); G02F 1/133512 (2013.01); G02F 1/134363 (2013.01); G02F 2001/13629 (2013.01); G02F 2001/134318 (2013.01); G02F 2001/134372 (2013.01);
Abstract

The present invention provides a liquid crystal display panel capable of preventing the occurrence of display unevenness in the perimeter of the display area in the FFS mode. The liquid crystal display panel of the present invention includes a pair of substrates; a sealing material; and a liquid crystal layer enclosed by the pair of substrates and the sealing material. One of the pair of substrates includes a pixel electrode provided with multiple slits, and a flat plate-shaped common electrode located on a different layer from the pixel electrode, with an insulating film between the pixel electrode and the common electrode; a non-display area includes a gate driver, multiple gate lead-out wires extending from the gate driver toward a display area, and a common lead-out wire electrically connected to the common electrode; the common lead-out wire intersects the multiple gate lead-out wires; and the common electrode covers an area between the common lead-out wire intersecting the multiple gate lead-out wires and a part of the perimeter of the display area along the common lead-out wire.


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