The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 31, 2016
Filed:
Jan. 27, 2015
Applicant:
Gsi Technology, Inc., Sunnyvale, CA (US);
Inventors:
Jyn-Bang Shyu, Cupertino, CA (US);
Yoshinori Sato, San Jose, CA (US);
Jae Hyeong Kim, San Ramon, CA (US);
Lee-Lean Shu, Los Altos, CA (US);
Assignee:
GSI TECHNOLOGY, INC., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/085 (2006.01);
U.S. Cl.
CPC ...
H03L 7/085 (2013.01);
Abstract
Systems and methods associated with control of clock signals are disclosed. In one exemplary implementation, there is provided a delay-lock-loop (DLL) and/or a delay/phase detection circuit. Moreover, such circuit may comprise digital phase detection circuitry, digital delay control circuitry, analog phase detection circuitry, and analog delay control circuitry. Implementations may include configurations that prevent transition back to the unlocked state due to jitter or noise.