The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2016

Filed:

Dec. 13, 2011
Applicants:

Mahbub Rashed, Santa Clara, CA (US);

Irene Y. Lin, Los Altos Hills, CA (US);

Steven Soss, Cornwall, NY (US);

Jeff Kim, San Jose, CA (US);

Chinh Nguyen, Austin, TX (US);

Marc Tarabbia, Pleasant Valley, NY (US);

Scott Johnson, Wappingers Falls, NY (US);

Subramani Kengeri, San Jose, CA (US);

Suresh Venkatesan, Danbury, CT (US);

Inventors:

Mahbub Rashed, Santa Clara, CA (US);

Irene Y. Lin, Los Altos Hills, CA (US);

Steven Soss, Cornwall, NY (US);

Jeff Kim, San Jose, CA (US);

Chinh Nguyen, Austin, TX (US);

Marc Tarabbia, Pleasant Valley, NY (US);

Scott Johnson, Wappingers Falls, NY (US);

Subramani Kengeri, San Jose, CA (US);

Suresh Venkatesan, Danbury, CT (US);

Assignee:

GLOBALFOUNDRIES, INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/70 (2006.01); H01L 21/8234 (2006.01); H01L 27/02 (2006.01); H01L 21/768 (2006.01); H01L 27/118 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823418 (2013.01); H01L 21/76895 (2013.01); H01L 21/823475 (2013.01); H01L 27/0207 (2013.01); H01L 27/11807 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A semiconductor device is provided for implementing at least one logic element. The semiconductor device includes a semiconductor substrate with a first transistor and a second transistor formed on the semiconductor substrate. Each of the transistors comprises a source, a drain, and a gate. A trench silicide layer electrically connects one of the source or the drain of the first transistor to one of the source or the drain of the second transistor.


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