The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2016

Filed:

Jul. 01, 2014
Applicant:

Mstar Semiconductor, Inc., Hsinchu Hsien, TW;

Inventors:

Yung Chang, Hsinchu, TW;

Chen-Nan Lin, Taipei, TW;

Chung-Ching Chen, Hsinchu, TW;

Assignee:

MSTAR SEMICONDUCTOR, INC., Hsinchu County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G11C 29/02 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G11C 29/022 (2013.01); G11C 29/023 (2013.01); G11C 29/028 (2013.01);
Abstract

A dynamic memory signal phase tracking method is provided. The method, applied to a memory controller that accesses a memory module, includes: issuing a memory access command and an access request to an arbiter to request for an access right of the memory module; when the access right is obtained, forwarding the memory access command to the memory module and asserting a flag signal; during a period of asserting the flag signal, sequentially using a plurality of candidate delay phases to adjust a memory signal for latching test data from the memory module, determining a delay phase according to latching results corresponding to the candidate delay phases, and recording the determined delay phases; updating an optimal delay phase according to the determined delay phase; and accessing the memory module according to the updated optimal delay phase.


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