The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 31, 2016
Filed:
Nov. 10, 2014
Applicant:
Perumal Ratnam, Fremont, CA (US);
Inventor:
Perumal Ratnam, Fremont, CA (US);
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 16/04 (2006.01); H01L 27/115 (2006.01); H01L 29/788 (2006.01); H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3418 (2013.01); G11C 16/0475 (2013.01); G11C 16/0483 (2013.01); G11C 16/3427 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01); H01L 29/7889 (2013.01); H01L 29/7926 (2013.01);
Abstract
A method of operating a memory device can include accessing at least one memory cell of a memory cell pair formed in opposing vertical sides of an opening by driving at least a first word line common to the memory cell pair to an access voltage to enable a channel conductance in both memory cells of the memory cell pair, driving a selector line, that is vertically aligned with the first word line within the opening, to a selection voltage to enable separate conductive source lines in the opposing vertical sides, and coupling one of the source lines to a source bias voltage and coupling the other of the source lines to a high impedance.