The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9354887 B1

PDF
Full Text
Expired
Date of Patent:
May. 31, 2016

Filed:

Jun. 28, 2010
Applicants:

Eric O. Mejdrich, Woodinville, WA (US);

Paul E. Schardt, Rochester, MN (US);

Robert A. Shearer, Rochester, MN (US);

Matthew R. Tubbs, Rochester, MN (US);

Inventors:

Eric O. Mejdrich, Woodinville, WA (US);

Paul E. Schardt, Rochester, MN (US);

Robert A. Shearer, Rochester, MN (US);

Matthew R. Tubbs, Rochester, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2006.01); G06F 12/08 (2016.01);
U.S. Cl.
CPC ...
G06F 9/3814 (2013.01); G06F 9/3861 (2013.01); G06F 12/0853 (2013.01); G06F 2205/065 (2013.01);
Abstract

A circuit arrangement and method selectively bypass an instruction buffer for selected instructions so that bypassed instructions can be dispatched without having to first pass through the instruction buffer. Thus, for example, in the case that an instruction buffer is partially or completely flushed as a result of an instruction redirect (e.g., due to a branch mispredict), instructions can be forwarded to subsequent stages in an instruction unit and/or to one or more execution units without the latency associated with passing through the instruction buffer.


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