The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2016

Filed:

Jul. 26, 2012
Applicants:

Masahiko Nakamizo, Osaka, JP;

Fumikazu Shimoshikiryoh, Osaka, JP;

Takamitsu Suzuki, Osaka, JP;

Akifumi Hashimoto, Osaka, JP;

Inventors:

Masahiko Nakamizo, Osaka, JP;

Fumikazu Shimoshikiryoh, Osaka, JP;

Takamitsu Suzuki, Osaka, JP;

Akifumi Hashimoto, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/133 (2006.01); G09G 3/36 (2006.01); G02F 1/1362 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13306 (2013.01); G02F 1/136213 (2013.01); G09G 3/3655 (2013.01); G02F 2001/134345 (2013.01); G09G 2300/0443 (2013.01); G09G 2300/0876 (2013.01); G09G 2310/06 (2013.01); G09G 2330/021 (2013.01);
Abstract

In a liquid crystal display device in which one pixel is divided into a plurality of sub-pixels, power consumption is reduced. A liquid crystal display device in which a pixel formation portion forming one pixel includes a first sub-pixel portion and a second sub-pixel portion is provided with a charge sharing circuit () for short-circuiting a CS bus line (CSL) provided for the first sub-pixel portion and a CS bus line (CSL) provided for the second sub-pixel portion to each other based on a short-circuit control signal (CTL). A CS voltage generating circuit () generates CS signals (CSand CS) whose potentials change every predetermined period. The charge sharing circuit () short-circuits the CS bus line (CSL) and the CS bus line (CSL) to each other at timing at which the potentials of the CS signals (CSand CS) change, based on the short-circuit control signal (CTL).


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