The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2016

Filed:

Jul. 18, 2014
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Thomas Clark Bryan, San Diego, CA (US);

Alvin Leng Sun Loke, San Diego, CA (US);

Stephen Knol, San Diego, CA (US);

Gregory Francis Lynch, San Diego, CA (US);

Tin Tin Wee, San Diego, CA (US);

LuVerne Ray Peterson, San Diego, CA (US);

Yue Li, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01); H03K 5/15 (2006.01); H01L 23/538 (2006.01); G06F 1/10 (2006.01); G11C 7/22 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H03K 5/15013 (2013.01); G06F 1/10 (2013.01); G11C 7/22 (2013.01); H01L 23/5384 (2013.01); H01L 23/5389 (2013.01); H01L 25/0655 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/24137 (2013.01); H01L 2924/15311 (2013.01);
Abstract

Circuits for die-to-die clock distribution are provided. A system includes a transmit clock tree on a first die and a receive clock tree on a second die. The transmit clock tree and the receive clock tree are the same, or very nearly the same, so that the insertion delay for a given bit on the transmit clock tree is the same as an insertion delay for a bit corresponding to the given bit on the receive clock tree. While there may be clock skew from bit-to-bit within the same clock tree, corresponding bits on the different die experience the same clock insertion delays.


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