The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2016

Filed:

Sep. 24, 2015
Applicant:

Travis William Lovitt, Ottawa, CA;

Inventor:

Travis William Lovitt, Ottawa, CA;

Assignee:

INPHI CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 9/00 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
H03K 3/356113 (2013.01); H03M 9/00 (2013.01);
Abstract

A combined multiplexer and latch circuit is provided that has only a single gate delay between the input of the overall circuit and the output of the circuit. Two complementary input signal stages each receive a complementary input signal and a multiplexer input. A clocked preset circuit presets a signal at the output of the combined multiplexer and latch circuit with timing based on a first phase of an input clock. A storage circuit stores a value based on the output of the combined multiplexer and latch circuit with timing based on a second phase of the input clock. The circuit has a preset mode during which the output of the combined multiplexer and latch circuit is preset, and has a latch mode during which a value output by the selected complementary signal input stage is output by the circuit and also stored in the storage circuit.


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