The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2016

Filed:

Nov. 19, 2014
Applicant:

Fujitsu Semiconductor Limited, Yokohama-shi, Kanagawa, JP;

Inventors:

Satoshi Torii, Kuwana, JP;

Hideaki Matsumura, Kuwana, JP;

Hikaru Kokura, Kuwana, JP;

Etsuro Kawaguchi, Kuwana, JP;

Katsuaki Ookoshi, Kuwana, JP;

Yuka Kase, Kuwana, JP;

Kengo Inoue, Mie, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01); H01L 31/00 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28282 (2013.01); H01L 27/1157 (2013.01); H01L 27/11573 (2013.01); H01L 27/11575 (2013.01); H01L 29/4234 (2013.01); H01L 29/66833 (2013.01);
Abstract

A semiconductor device manufacturing method includes: forming an element isolation insulating film in a semiconductor substrate; forming a first film on a surface of the semiconductor substrate; forming a second film on the element isolation insulating film and on the first film; forming a first resist pattern that includes a first open above the element isolation insulating film in a first region; removing the second film on the element isolation insulating film in the first region to separate the second film in the first region into a plurality of parts by performing first etching; forming a third film on the second film in the first region; forming a first gate electrode on the third film in the first region; and forming a first insulating film that includes the first to third films under the first gate electrode by patterning the first to third films.


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