The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 2016
Filed:
Feb. 21, 2013
Tsubasa Onda, Tokyo, JP;
Yoshitaka Toyoda, Tokyo, JP;
Daisuke Suzuki, Tokyo, JP;
Koichi Yamashita, Tokyo, JP;
Narihiro Matoba, Tokyo, JP;
Tsubasa Onda, Tokyo, JP;
Yoshitaka Toyoda, Tokyo, JP;
Daisuke Suzuki, Tokyo, JP;
Koichi Yamashita, Tokyo, JP;
Narihiro Matoba, Tokyo, JP;
MITSUBISHI ELECTRIC CORPORATION, Tokyo, JP;
Abstract
A region determination circuit () determines whether or not each of the pixels in an image is within a region subject to correction, in which pixels having at most a predetermined brightness level appear with a frequency equal to or less than a predetermined value. An offset level generation circuit () generates an offset level (Offset) on the basis of the brightness of the pixels determined to be within the region subject to correction. An offset subtraction circuit () subtracts the offset level (Offset) from the image signal (Yi) to generate an offset image signal (Yofst). A gain generation circuit () generates a gain for the offset image signal (Yofst). A gain multiplication circuit () multiplies the offset image signal (Yofst) by the gain to generate a corrected image signal (Ya).