The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2016

Filed:

Dec. 19, 2011
Applicants:

Stephen D. Presant, San Jose, CA (US);

Alexander J. Branover, Chestnut Hill, MA (US);

Oleksandr Khodorkovsky, Toronto, CA;

Ljubisa Bajic, Toronto, CA;

Inventors:

Stephen D. Presant, San Jose, CA (US);

Alexander J. Branover, Chestnut Hill, MA (US);

Oleksandr Khodorkovsky, Toronto, CA;

Ljubisa Bajic, Toronto, CA;

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 11/30 (2006.01); G06F 9/50 (2006.01); G06F 1/20 (2006.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5094 (2013.01); G06F 1/206 (2013.01); G06F 1/324 (2013.01); G06F 1/3296 (2013.01); Y02B 60/1217 (2013.01); Y02B 60/1275 (2013.01); Y02B 60/1285 (2013.01); Y02B 60/142 (2013.01);
Abstract

A method and apparatus includes a multi-processor apparatus including a plurality of integrated circuit processors having a shared thermal platform. Each processor has at least one subsystem operable at a plurality of different power settings, at least one internal thermal parameter detector providing power data related to the processor, and a power management unit. The method and apparatus illustratively shares power data from the at least one internal thermal parameter detector of each processor between the power management units of the plurality of processors; compares the shared power data from the plurality of processors to a thermal design power limit for the shared thermal platform; and controls a power setting of the at least one subsystem of the plurality of processors within the shared thermal platform based on the comparison of the shared power data to the thermal design power limit for the shared thermal platform.


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