The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2016

Filed:

Apr. 04, 2014
Applicant:

Texas Instruments Deutschland Gmbh, Freising, DE;

Inventors:

Johannes Gerber, Unterschleissheim, DE;

Matthias Arnold, Freising, DE;

Ronald Nerlich, Freising, DE;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/00 (2006.01); G05F 3/16 (2006.01); G05F 3/20 (2006.01); H02H 3/08 (2006.01); H02H 9/02 (2006.01); G05F 1/56 (2006.01); G01R 19/00 (2006.01);
U.S. Cl.
CPC ...
G05F 1/56 (2013.01); G01R 19/00 (2013.01);
Abstract

A mixed signal approach is applied to detect an output voltage condition as applied to a load. A current mode monitoring approach can be adopted and applied in discrete time using a mixed analog and digital approach. For application to various low drop-out voltage regulator situations, a sensing transistor can be connected in parallel with a feedback loop transistor of the low drop-out voltage regulator circuit to create a sensing current that is proportional to the current passing through the feedback loop transistor and thus the output current provided to the load. This sensing approach can be adapted to sense both overload and light load conditions to allow dynamic power control of the device.


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