The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2016
Filed:
May. 19, 2015
SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;
Seung Jee Kim, Seongnam-si, KR;
Won Duck Jung, Icheon-si, KR;
SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;
Abstract
A package substrate includes a core layer, first external interconnection lines on a top surface of the core layer, and internal interconnection lines. The first external interconnection lines include a first outermost external interconnection line on an edge of the core layer, and the internal interconnection lines include an outermost internal interconnection line in the edge of the core layer. A first bonding pad is disposed on the first outermost external interconnection line and exposed in a first bonding region of the core layer. A second bonding pad is disposed on the outermost internal interconnection line and exposed in a second bonding region of the core layer. The first bonding region is spaced apart from a chip attachment region by a first distance, and the second bonding region is spaced apart from the chip attachment region by a second distance greater than the first distance.