The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2016

Filed:

Feb. 12, 2015
Applicant:

Renesas Electronics Corporation, Kawasaki, Kanagawa, JP;

Inventors:

Masahiro Nomura, Kanagawa, JP;

Taro Sakurabayashi, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/173 (2006.01); G01R 31/3185 (2006.01); H03K 3/037 (2006.01); H03K 19/00 (2006.01); H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
H03K 19/1731 (2013.01); G01R 31/318575 (2013.01); H03K 3/0375 (2013.01); H03K 19/0008 (2013.01); H03K 19/0016 (2013.01); H03K 19/1776 (2013.01); H03K 19/17728 (2013.01);
Abstract

A semiconductor integrated circuit has N input terminals; N output terminals; a plurality of flip-flops (FFs) including N FFs and R redundant FFs; a selector section configured to select N selected FFs from the plurality of FFs depending on reconfiguration information and to switch data flow such that data input to the N input terminals are respectively output to the N output terminals by the N selected FFs; and an error detection section. In a test mode, the N FFs form a scan chain and a scan data is input to the scan chain. The error detection section detects an error FF included in the N FFs based on scan input/output data respectively input/output to/from the N FFs in the test mode and further generates the reconfiguration information such that the detected error FF is excluded from the N selected FFs.


Find Patent Forward Citations

Nomura, Masahiro. (2016). Semiconductor integrated circuit and power-supply voltage adaptive control system (U.S. Patent No. 9344089). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9344089

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…