The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2016

Filed:

Mar. 04, 2015
Applicant:

Sony Corporation, Tokyo, JP;

Inventor:

Yasunori Tsukuda, Kanagawa, JP;

Assignee:

SONY CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/06 (2006.01); G06F 1/10 (2006.01); H03K 19/003 (2006.01); G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
H03K 19/00315 (2013.01); G06F 1/04 (2013.01);
Abstract

A clock tree unit cell circuit includes a first input terminal configured to receive a clock signal from an upstream side of a clock tree; a first output terminal configured to output a clock signal to a downstream side of the clock tree; a second input terminal configured to receive a standby signal from the upstream side of the clock tree; a third input terminal configured to receive a standby signal from the downstream side of the clock tree; a logic circuit configured to perform a predetermined logical operation on the clock signal inputted to the first input terminal and output the clock signal to the first output terminal; and a control circuit that is connected to the second input terminal, the third input terminal, and an output control terminal of the logic circuit.


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