The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2016

Filed:

Apr. 04, 2012
Applicant:

Robert J. Callanan, Raleigh, NC (US);

Inventor:

Robert J. Callanan, Raleigh, NC (US);

Assignee:

Cree, Inc., Durham, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 1/00 (2006.01); H03K 17/06 (2006.01); H03K 17/30 (2006.01);
U.S. Cl.
CPC ...
H03K 17/063 (2013.01); H03K 2017/307 (2013.01); H03K 2217/0081 (2013.01);
Abstract

A circuit, which includes a high voltage driver, is disclosed. The high voltage driver includes a P-type field effect transistor (PFET) and a source bias circuit. The source bias circuit receives a low voltage input signal and applies a direct current (DC) bias to the low voltage input signal to provide a DC biased signal. The PFET has a first source, a first gate, and a first drain. The first source receives the DC biased signal. The first gate receives a first low voltage DC supply signal. The first drain provides a high voltage output signal based on the DC biased signal and the first low voltage DC supply signal. In this regard, the high voltage driver receives and translates the low voltage input signal to provide the high voltage output signal.


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