The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2016

Filed:

Aug. 29, 2014
Applicant:

Socionext Inc., Yokohama-shi, Kanagawa, JP;

Inventors:

Ian Juso Dedic, Northolt Middlesex, GB;

Gavin Lambertus Allen, Seabird Western, AU;

Assignee:

SOCIONEXT INC., Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/13 (2014.01); H03H 17/08 (2006.01); H03M 1/06 (2006.01); G06F 1/04 (2006.01); H03B 27/00 (2006.01); H03K 5/15 (2006.01); H03K 5/135 (2006.01); G06F 1/12 (2006.01);
U.S. Cl.
CPC ...
H03H 17/08 (2013.01); G06F 1/04 (2013.01); G06F 1/12 (2013.01); H03B 27/00 (2013.01); H03K 5/135 (2013.01); H03K 5/1502 (2013.01); H03M 1/0624 (2013.01); H03H 2218/04 (2013.01); H03H 2218/12 (2013.01);
Abstract

Signal-alignment circuitry, comprising: phase-rotation circuitry connected to receive one or more input clock signals and operable to generate therefrom one or more output clock signals; and control circuitry operable to control the amount of phase rotation applied by the phase-rotation circuitry to carry out a plurality of alignment operations, the alignment operations comprising: one or more first operations each comprising rotating one or more of said output clock signals relative to one or more of the other said output clock signals, to bring a phase relationship between said output clock signals, or clock signals derived therefrom, towards or into a given phase relationship; and one or more second operations each comprising rotating all of said output clock signals together, to bring a phase relationship between said output or derived clock signals and said input clock signals or an external-reference signal towards or into a given phase relationship.


Find Patent Forward Citations

Loading…