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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9337256 B1

PDFFull Text
Date of Patent:
May. 10, 2016

Filed:

Mar. 18, 2013

Semiconductor device and method of manufacturing semiconductor device

Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventor:

Naoki Izumi, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:

Rabin & Berdo, P.C.

Primary Examiner:

Robert Carpenter

Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/761 (2006.01); H01L 21/8234 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 21/8238 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0646 (2013.01); H01L 21/761 (2013.01); H01L 21/823412 (2013.01); H01L 21/823456 (2013.01); H01L 21/823487 (2013.01); H01L 27/0922 (2013.01); H01L 29/66719 (2013.01); H01L 29/66734 (2013.01); H01L 21/82385 (2013.01); H01L 21/823807 (2013.01); H01L 21/823885 (2013.01); H01L 29/4236 (2013.01);
Abstract

A method of manufacturing a semiconductor device having a VDMOSFET (Vertical Double-diffused Metal Oxide Semiconductor Field-Effect Transistor) and a planar gate MOSFET (Metal Oxide Semiconductor Field-Effect Transistor), including forming a semiconductor layer of a first conductivity type by epitaxy, forming a body region recess for forming a body region of the VDMOSFET on the semiconductor layer, and embedding a semiconductor material of a second conductivity type in the body region recess by epitaxy or CVD (Chemical Vapor Deposition).

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Izumi, Naoki. (2016). Semiconductor device and method of manufacturing semiconductor device (U.S. Patent No. 9337256). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9337256

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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