The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2016
Filed:
Oct. 20, 2011
Applicants:
Kai Xue MA, Singapore, SG;
Yang LU, Singapore, SG;
Jiangmin Gu, Singapore, SG;
Kiat Seng Yeo, Singapore, SG;
Inventors:
Kai Xue Ma, Singapore, SG;
Yang Lu, Singapore, SG;
Jiangmin Gu, Singapore, SG;
Kiat Seng Yeo, Singapore, SG;
Assignee:
Nanyang Technological University, Singapore, SG;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/60 (2006.01); H01L 23/66 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/60 (2013.01); H01L 23/66 (2013.01); H01L 24/05 (2013.01); H01L 2223/6627 (2013.01); H01L 2223/6666 (2013.01); H01L 2924/13034 (2013.01); H01L 2924/13091 (2013.01);
Abstract
A miniature passive structure for electrostatic discharge (ESD) protection and input/output (I/O) matching for a high frequency integrated circuit is provided. The miniature passive structure includes at least one shunt stub and at least one load line. The shunt stub(s) each provide a corresponding ESD discharge path. The load line(s) are coupled to the shunt stub(s) and provide loading effects for the shunt stub(s).