The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2016

Filed:

Apr. 29, 2014
Applicant:

Futurewei Technologies, Inc., Plano, TX (US);

Inventors:

Hao Luan, Plano, TX (US);

Alan Gatherer, Richardson, TX (US);

Yan Bei, Shanghai, CN;

Jun Ying, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/00 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/061 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01);
Abstract

Disclosed herein are a shared memory controller and a method of controlling a shared memory. An embodiment method of controlling a shared memory includes concurrently scanning-in a plurality of read/write commands for respective transactions. Each of the plurality of read/write commands includes respective addresses and respective priorities. Additionally, each of the respective transactions is divisible into at least one beat and at least one of the respective transactions is divisible into multiple beats. The method also includes dividing the plurality of read/write commands into respective beat-level read/write commands and concurrently arbitrating the respective beat-level read/write commands according to the respective addresses and the respective priorities. Concurrently arbitrating yields respective sequences of beat-level read/write commands corresponding to the respective addresses. The method further includes concurrently dispatching the respective sequences of beat-level read/write commands to the shared memory, thereby accessing the shared memory.


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