The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2016

Filed:

Oct. 07, 2013
Applicants:

Daisy Williams, Kanata, CA;

Xiaoyi Bao, Ottawa, CA;

Liang Chen, Ottawa, JP;

Inventors:

Daisy Williams, Kanata, CA;

Xiaoyi Bao, Ottawa, CA;

Liang Chen, Ottawa, JP;

Assignee:

Other;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06E 3/00 (2006.01); G02F 3/00 (2006.01); G02F 3/02 (2006.01);
U.S. Cl.
CPC ...
G02F 3/026 (2013.01);
Abstract

A combined Brillouin gain and loss process has been created in a polarization maintaining optical fiber to realize all-Optical NAND/NOT/AND/OR logic gates in the frequency domain. A model describing the interaction of a Stokes, anti-Stokes and continuous wave, and two acoustic waves inside a fiber, ranging in length from 350 m-2300 m, was used to theoretically model the gates. Through the optimization of the gain and loss process, switching contrasts of 20-88% have been achieved, under different configurations. Experimental setups for NAND/NOT/AND/OR optical logic gates have been described. A method and system for designing the all-optical logic gates have been also provided.


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