The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Jan. 08, 2013
Applicant:

Hideki Okita, Sunnyvale, CA (US);

Inventor:

Hideki Okita, Sunnyvale, CA (US);

Assignee:

HITACHI, LTD., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/803 (2013.01); H04L 12/709 (2013.01); H04L 12/743 (2013.01); H04L 29/12 (2006.01);
U.S. Cl.
CPC ...
H04L 47/125 (2013.01); H04L 45/245 (2013.01); H04L 45/7453 (2013.01); H04L 61/103 (2013.01); H04L 61/2069 (2013.01); Y02B 60/33 (2013.01);
Abstract

Exemplary embodiments provide a technique to improve the system availability of the systems that have multiple links and are connected to a network fabric. In one embodiment, a switch comprises: a memory storing a first logical group which has a first plurality of IP addresses of a first plurality of ports and is assigned to a first ID (identifier), and a second logical group which has a second plurality of IP addresses of a second plurality of ports and is assigned to a second ID; and a controller controlling to cause a logical path of the first logical group to use a first physical path which is different from a second physical path to be used by a logical path of the second logical group, based on the first ID and the second ID.


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