The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Sep. 15, 2014
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Paolo Novellini, Gorgonzola, IT;

Giovanni Guasti, Cornaredo, IT;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); H04B 1/04 (2006.01); G06F 1/10 (2006.01); G06F 5/06 (2006.01); G11C 7/22 (2006.01); H04L 25/05 (2006.01);
U.S. Cl.
CPC ...
H04B 1/0475 (2013.01); G06F 1/10 (2013.01); G06F 5/06 (2013.01); G11C 7/22 (2013.01); G11C 7/222 (2013.01); H04L 25/05 (2013.01);
Abstract

In a method relating generally to starting a plurality of transmitters, a sequence is initiated for each of the plurality of transmitters having corresponding data buffers. Latency is set for each of the data buffers responsive to execution of the sequence. The sequence includes: obtaining a read address associated with a read clock signal; obtaining a write address associated with a write clock signal; determining a difference between the read address and the write address; asserting a flag signal associated with the difference; and adjusting the read clock signal to change the difference to locate a change of state location for the flag signal to set the latency for a data buffer of the data buffers.


Find Patent Forward Citations

Loading…