The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Aug. 07, 2015
Applicant:

Murata Manufacturing Co., Ltd., Kyoto-fu, JP;

Inventors:

Yasunari Umemoto, Kyoto-fu, JP;

Atsushi Kurokawa, Kyoto-fu, JP;

Tsunekazu Saimei, Kyoto-fu, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/732 (2006.01); H01L 31/072 (2012.01); H01L 21/331 (2006.01); H01L 29/737 (2006.01); H01L 29/08 (2006.01); H01L 29/15 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7325 (2013.01); H01L 29/0821 (2013.01); H01L 29/152 (2013.01); H01L 29/20 (2013.01); H01L 29/7371 (2013.01);
Abstract

P-type second semiconductor layers each interposed between a corresponding pair of n-type first semiconductor layers reduce the apparent doping concentration in the entire collector layer without reducing the doping concentrations in the first semiconductor layers. This improves the linearity of capacitance characteristics and enables sufficient mass productivity to be achieved. Interposing each of the second semiconductor layers between the corresponding pair of the first semiconductor layers reduce the average carrier concentration over the entire collector layer, which allows a wide depletion layer to be formed inside the collector layer and, as a result, reduces base-collector capacitance.


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