The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2016
Filed:
Sep. 03, 2013
Applicant:
Ps4 Luxco S.a.r.l., Luxembourg, LU;
Inventors:
Shingo Ujihara, Tokyo, JP;
Koji Taniguchi, Tokyo, JP;
Assignee:
PS4 LUXCO S.A.R.L., Luxembourg, LU;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 29/06 (2006.01); H01L 27/108 (2006.01); H01L 21/762 (2006.01); H01L 21/76 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0649 (2013.01); H01L 21/76 (2013.01); H01L 21/76224 (2013.01); H01L 21/76229 (2013.01); H01L 27/10894 (2013.01);
Abstract
A semiconductor device includes, on one semiconductor substrate: a first element isolation region having a first width, wherein a liner oxide film, a liner nitride film and a silicon dioxide film are provided in succession from an outer peripheral side of an upper surface of the first element isolation region; and a second element isolation region having a second width that is larger than the first width, wherein a liner oxide film and a silicon dioxide film are provided in succession from an outer peripheral side of an upper surface of the second element isolation region.