The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2016
Filed:
Mar. 03, 2011
Applicants:
Ali Yazdani, Princeton, NJ (US);
N. Phuan Ong, Belle Mead, NJ (US);
Robert J. Cava, Princeton, NJ (US);
Inventors:
Ali Yazdani, Princeton, NJ (US);
N. Phuan Ong, Belle Mead, NJ (US);
Robert J. Cava, Princeton, NJ (US);
Assignee:
Other;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 23/532 (2006.01); H01L 29/786 (2006.01); H01L 21/768 (2006.01); C22C 28/00 (2006.01); C22C 30/00 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53209 (2013.01); C22C 28/00 (2013.01); C22C 30/00 (2013.01); H01L 21/76838 (2013.01); H01L 23/53271 (2013.01); H01L 29/78 (2013.01); H01L 29/78681 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/01051 (2013.01); Y10T 29/49204 (2015.01);
Abstract
An interconnect is disclosed with enhanced immunity of electrical conductivity to defects. The interconnect includes a material with charge carriers having topological surface states. Also disclosed is a method for fabricating such interconnects. Also disclosed is an integrated circuit including such interconnects. Also disclosed is a gated electronic device including a material with charge carriers having topological surface states.