The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2016
Filed:
Oct. 05, 2011
Applicant:
Koji Taniguchi, Tokyo, JP;
Inventor:
Koji Taniguchi, Tokyo, JP;
Assignee:
PS4 Luxco S.a.r.l., Luxembourg, LU;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/06 (2006.01); H01L 21/8234 (2006.01); H01L 21/762 (2006.01); H01L 27/108 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823437 (2013.01); H01L 21/76232 (2013.01); H01L 27/10814 (2013.01); H01L 27/10876 (2013.01); H01L 29/1083 (2013.01); H01L 29/7813 (2013.01);
Abstract
A semiconductor device includes a semiconductor substrate, a gate electrode, a dummy gate electrode, and a first impurity diffusion region. The semiconductor substrate has first and second grooves. The gate electrode is in the first groove. The dummy gate electrode is in the second groove. The dummy gate electrode has a first top surface. The first impurity diffusion region in the semiconductor substrate is positioned between the first and second grooves. The first top surface is positioned at a lower level than a bottom of the first impurity diffusion region.