The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Sep. 09, 2014
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, Tokyo, JP;

Inventor:

Kenichi Anzou, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/44 (2006.01); G11C 7/10 (2006.01); G11C 29/04 (2006.01); G11C 29/12 (2006.01);
U.S. Cl.
CPC ...
G11C 29/4401 (2013.01); G11C 7/1006 (2013.01); G11C 2029/0405 (2013.01); G11C 2029/0407 (2013.01); G11C 2029/0409 (2013.01); G11C 2029/1208 (2013.01);
Abstract

According to one embodiment, there is provided a semiconductor integrated circuit including a memory, a capture register, a writing unit, and a control unit. The memory includes a plurality of memory bit cells. The capture register stores data read out from a memory bit cell selected out of the plurality of memory bit cells. The writing unit writes relevant data according to the data stored in the capture register to the memory bit cell. The control unit reads the relevant data from the written memory bit cell, compares the relevant data according to the data stored in the capture register and the read-out relevant data, controls the capture register such that a comparison result is stored by overwriting a result as a self-test result about the written memory bit cell, and controls the writing unit such that the original data according to the read-out relevant data is rewritten to the selected memory bit cell.


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