The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Nov. 29, 2010
Applicants:

Laszlo Hars, Lafayette, CO (US);

Donald Preston Matthews, Longmont, CO (US);

Inventors:

Laszlo Hars, Lafayette, CO (US);

Donald Preston Matthews, Longmont, CO (US);

Assignee:

Seagate Technology LLC, Scotts Valley, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G11C 11/56 (2006.01); G11C 7/10 (2006.01); G11C 13/00 (2006.01); G11C 16/10 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 11/5642 (2013.01); G11C 7/1006 (2013.01); G11C 11/5628 (2013.01); G11C 11/5635 (2013.01); G11C 13/0002 (2013.01); G11C 13/0033 (2013.01); G11C 16/10 (2013.01); G11C 16/3418 (2013.01); G11C 2211/5647 (2013.01);
Abstract

Method and apparatus for sanitizing a memory using bit-inverted data. In accordance with various embodiments, a memory location is sanitized by sequential steps of reading a bit value stored in a selected memory cell of the memory, inverting the bit value, and writing the inverted bit value back to the selected memory cell. The memory cell may be erased between the reading and writing steps, as well as after the writing step. Random bit values may be generated and stored to the memory cell, and run-length limited constraints can be used to force bit-inversions.


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