The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2016
Filed:
Feb. 24, 2011
Applicant:
Jeong Hun Lee, Daejeon-si, KR;
Inventor:
Jeong Hun Lee, Daejeon-si, KR;
Assignee:
SK HYNIX INC., Icheon-si, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/4072 (2006.01); G11C 5/14 (2006.01); G11C 11/406 (2006.01); G11C 11/4074 (2006.01); H03K 5/08 (2006.01); H03M 1/76 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4072 (2013.01); G11C 5/147 (2013.01); G11C 11/406 (2013.01); G11C 11/4074 (2013.01); G11C 11/40615 (2013.01); H03K 5/08 (2013.01); H03M 1/765 (2013.01);
Abstract
An integrated circuit includes a reference voltage level setting circuit and a reference voltage generation circuit. The reference voltage level setting circuit is configured to set a level of an input reference voltage to a preset level in a power-up period or a self-refresh mode. The reference voltage generation circuit is configured to select one of a plurality of reference voltages and output the selected reference voltage as the input reference voltage when the power-up period is ended and an operation mode is not in the self-refresh mode.