The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2016
Filed:
Apr. 30, 2014
Oracle International Corporation, Redwood City, CA (US);
Duo Ding, Austin, TX (US);
Srinivas Sanivarapu, Cedar Park, TX (US);
Lai-ching Lydia So, Cupertino, CA (US);
Joseph Curt Peters, Austin, TX (US);
Carl Alfred Shisler, Austin, TX (US);
Gary Lynn Fowler, Leander, TX (US);
Thuvan Le, San Jose, CA (US);
Kaiwha Peng, Santa Clara, CA (US);
Tao Hou, Santa Clara, CA (US);
Wilson Fai Chin, Palo Alto, CA (US);
Oracle International Corporation, Redwood Shores, CA (US);
Abstract
A method for manipulating a circuit design includes receiving multiple dummy cell modification parameters, selecting, by a computer processor and based on the dummy cell modification parameters, a dummy cell insertion region on a circuit design, and generating, in the dummy cell insertion region, multiple dummy cells. The method further includes selecting a first dummy cell from the dummy cells, determining, by the computer processor and based on a location of the first dummy cell, an illegal overlap with the first dummy cell, and removing, by the computer processor and from the dummy cells, the first dummy cell. The method further includes inserting, by the computer processor, on the circuit design, and after removing the first dummy cell, the dummy cells to obtain a modified circuit design, and presenting the modified circuit design.