The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Jun. 04, 2013
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ali R. Butt, Blacksburg, VA (US);

Prasenjit Sarkar, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/173 (2006.01);
U.S. Cl.
CPC ...
G06F 15/17331 (2013.01);
Abstract

Embodiments of the present invention relate to a new data center architecture that provides for efficient processing in distributed analytics applications. In one embodiment, a distributed processing node is provided. The node comprises a plurality of subnodes. Each subnode includes at least one processor core operatively connected to a memory. A first interconnect operatively connects each of the plurality of subnodes within the node. A second interconnect operably connects each of the plurality of subnodes to a storage. A process runs on a first of the plurality of subnodes, the process being operative to retrieve data from the memory of the first subnode. The process interrogates the memory of the first subnode for requested data. If the requested data is not found in the memory of the first subnode, the process interrogates the memory of at least one other subnode of the plurality of subnodes via the first interconnect. If the requested data is found in the memory of the other subnode, the process copies the requested data to the memory of the first subnode. If the requested data is not found in the memory of the first subnode or the memories of at least one subnode of the plurality of subnodes, the process interrogates the storage via the second interconnect.


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