The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Sep. 15, 2012
Applicants:

Yan LI, San Jose, CA (US);

Alexander Hubris, San Jose, CA (US);

Hao Zhong, Milpitas, CA (US);

Inventors:

Yan Li, San Jose, CA (US);

Alexander Hubris, San Jose, CA (US);

Hao Zhong, Milpitas, CA (US);

Assignee:

Seagate Technology LLC, Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/16 (2006.01); G06F 12/02 (2006.01); G11C 16/34 (2006.01); G11C 29/42 (2006.01); G11C 29/50 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1666 (2013.01); G06F 12/0246 (2013.01); G11C 16/3495 (2013.01); G11C 29/42 (2013.01); G11C 29/50 (2013.01); G11C 29/52 (2013.01); G06F 2212/7211 (2013.01);
Abstract

An NVM controller measures cell damage for wear leveling in an NVM, thus improving performance, reliability, lifetime, and/or cost of a storage sub-system, such as an SSD. In a first aspect, the controller determines that an error reading a page of NVM was caused by cell damage and/or cell leakage. The controller reprograms and immediately reads back the page, detecting that the error was caused by cell damage if an error is detected during the immediate read. In a second aspect, the cell damage is tracked by updating cell damage counters for pages and/or blocks of NVM. In a third aspect, wear leveling is performed based at least in part upon measured cell damage for pages and/or blocks of NVM.


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