The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2016

Filed:

Sep. 03, 2014
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Elias Hani Dagher, Aliso Viejo, CA (US);

Kentaro Yamamoto, San Diego, CA (US);

Dinesh Jagannath Alladi, San Diego, CA (US);

Assignee:

QUALCOMM, Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 3/00 (2006.01); H03M 1/34 (2006.01);
U.S. Cl.
CPC ...
H03M 1/34 (2013.01); H03M 3/30 (2013.01); H03M 3/37 (2013.01); H03M 3/454 (2013.01); H03M 3/458 (2013.01); H03M 3/464 (2013.01);
Abstract

In one embodiment, a circuit includes a quantizer configured to convert an analog input signal to a digital signal. The quantizer includes a first feedback path including a first digital to analog converter (DAC) coupled from an output of the quantizer to a summing junction that is coupled to an input of the quantizer. The first feedback path converts the digital signal to a first corresponding analog value for combining with the analog input signal at the summing junction. Also, the quantizer includes a plurality of excess loop delay (ELD) compensation paths coupled to the summing junction configured to compensate for excess loop delay from a second feedback path coupled from the output of the quantizer to input of the quantizer via a loop filter. Second DACs in the second feedback path convert the digital signal to a second corresponding analog value for combining with the analog input signal.


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