The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2016
Filed:
Dec. 03, 2014
Texas Instruments Incorporated, Dallas, TX (US);
Sabu Paul, Cochin, IN;
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
A circuit for equalizing the impedances of a PMOS device with an NMOS device includes a first reference voltage coupled to the source of the first PMOS device. A second reference voltage is coupled to the source of the NMOS device. A first node has a common mode voltage between the first reference voltage and the second reference voltage. A second node is located between the PMOS device and the NMOS device. A first gate voltage is coupled to the gate of either the PMOS device or the NMOS device. An operational amplifier has a first input coupled to the first node and a second input coupled to the second node, the output of the operational amplifier is a second gate voltage that is coupled to the gate of one of either the PMOS device or the NMOS device that is not coupled to the first gate voltage.