The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2016

Filed:

Oct. 28, 2014
Applicant:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Inventors:

Akio Tamagawa, Kanagawa, JP;

Makoto Tanaka, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0646 (2013.01); H01L 21/823481 (2013.01); H01L 24/49 (2013.01); H01L 27/088 (2013.01); H01L 24/45 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/49175 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/13091 (2013.01);
Abstract

In a semiconductor device, a lightly doped second semiconductor layer of a first conductive type is joined with a heavily doped first semiconductor layer of the first conductive type. A power transistor having a first conductive type channel and a transistor are formed in surface regions of the second semiconductor layer, respectively. A first diffusion layer of a second conductive type is formed in a surface region of the second semiconductor layer to provide a boundary between the power transistor and the transistor. The first semiconductor layer functions as a drain of the power transistor. The first diffusion layer region is set to the same voltage as that of the drain.


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