The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2016

Filed:

Jun. 29, 2012
Applicants:

Sandro Rossi, Pavia, IT;

Antonio Ricciardo, Vigevano, IT;

Davide Ugo Ghisu, Milan, IT;

Inventors:

Sandro Rossi, Pavia, IT;

Antonio Ricciardo, Vigevano, IT;

Davide Ugo Ghisu, Milan, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/56 (2006.01); H03K 17/16 (2006.01); H03K 17/30 (2006.01); G05F 3/02 (2006.01); H03K 19/0185 (2006.01); H03K 19/0944 (2006.01);
U.S. Cl.
CPC ...
G05F 3/02 (2013.01); H03K 19/018521 (2013.01); H03K 19/09443 (2013.01);
Abstract

A switching circuit is electrically coupled between a connection terminal and an output terminal of a transmission channel and includes first and second switching transistors electrically coupled in series to each other and having respective body diodes in anti-series, between the connection terminal and the output terminal. The switching circuit comprises a bootstrap circuit connected to respective first and second control terminals of these first and one second switching transistors, as well as to respective first and second voltage references. The bootstrap circuit includes a first parasitic capacitance electrically coupled between the first control terminal and a first bootstrap node, and a second parasitic capacitance electrically coupled between the second control terminal and a second bootstrap node. The parasitic capacitances have value of at least one order of magnitude lower with respect to the gate-source capacitances of the first and second switching transistors.


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