The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2016

Filed:

Jun. 26, 2014
Applicants:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Stmicroelectronics International N.v., Schiphol, NL;

Inventors:

Dino Faralli, Milan, IT;

Benedetto Vigna, Potenza, IT;

Laura Maria Castoldi, Abbiategrasso, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81B 7/00 (2006.01); B81C 1/00 (2006.01);
U.S. Cl.
CPC ...
B81B 7/0061 (2013.01); B81C 1/00269 (2013.01); B81B 2201/0264 (2013.01); B81B 2203/0127 (2013.01); B81B 2207/012 (2013.01); B81C 2203/0118 (2013.01);
Abstract

A MEMS device wherein a die of semiconductor material has a first face and a second face. A membrane is formed in or on the die and faces the first surface. A cap is fixed to the first face of the first die and is spaced apart from the membrane by a space. The die is fixed, on its second face, to an ASIC, which integrates a circuit for processing the signals generated by the die. The ASIC is in turn fixed on a support. A packaging region coats the die, the cap, and the ASIC and seals them from the outside environment. A fluidic path is formed through the support, the ASIC, and the first die, and connects the membrane and the first face of the die with the outside, without requiring holes in the cap.


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