The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2016
Filed:
Mar. 03, 2014
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Xiangdong Chen, Irvine, CA (US);
Ohsang Kwon, San Diego, CA (US);
Foua Vang, Lemon Grove, CA (US);
Animesh Datta, San Diego, CA (US);
Seid Hadi Rasouli, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 27/088 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 27/118 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); H01L 21/76895 (2013.01); H01L 21/823437 (2013.01); H01L 21/823475 (2013.01); H01L 27/088 (2013.01); H01L 27/11807 (2013.01); H01L 21/823412 (2013.01); H01L 21/823481 (2013.01); H01L 2027/11831 (2013.01); H01L 2027/11861 (2013.01); H01L 2027/11866 (2013.01);
Abstract
A transistor cell is provided that includes a dummy gate overlaying a continuous oxide definition (OD) region. A first portion of the OD region adjacent a first side of the dummy forms the drain. The cell includes a local interconnect structure that couples the dummy gate and a portion of the OD region adjacent a second opposing side of the dummy gate to a source voltage.