The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2016

Filed:

Dec. 16, 2014
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-Si, KR;

Inventors:

Kwang Soo Kim, Suwon-Si, KR;

Kee Ju Um, Suwon-Si, KR;

Suk Ho Lee, Suwon-Si, KR;

Joon Seok Chae, Suwon-Si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/02 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/00 (2006.01); H01L 25/18 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49548 (2013.01); H01L 23/49537 (2013.01); H01L 23/49551 (2013.01); H01L 23/49562 (2013.01); H01L 23/49575 (2013.01); H01L 24/49 (2013.01); H01L 25/18 (2013.01); H01L 23/3107 (2013.01); H01L 23/49531 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48108 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48177 (2013.01); H01L 2224/49171 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/14 (2013.01);
Abstract

There is provided a leadless package type power semiconductor module. According to an exemplary embodiment of the present disclosure, the leadless package type power semiconductor module includes: connection terminals of a surface mounting type (SMT) formed at edges at which respective sides of four surfaces meet each other; a first mounting area connected to the connection terminals through a bridge to be disposed at a central portion thereof and mounted with power devices or control ICs electrically connected to the power devices to control the power devices; and second mounting areas formed between the connection terminals and mounted with the power devices or the control ICs, wherein the first mounting area is disposed at a different height from the second mounting area through the bridge to generate a phase difference from the second mounting area. Therefore, it is possible to implement a high-integration, high-performance, and small power semiconductor module by applying a three-dimensional structure deviating from a one-dimensional flat structure.


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