The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2016
Filed:
Dec. 15, 2014
Freescale Semiconductor, Inc., Austin, TX (US);
Paige M Holm, Phoenix, AZ (US);
Lianjun Liu, Chandler, TX (US);
Ruben B. Montez, Cedar Park, TX (US);
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Abstract
A front-end-of-line through-substrate via is provided for application in certain semiconductor device fabrication, including microelectromechanical (MEMS) devices. The through-substrate via (TSV) has a conductive element formed from the cylindrical core of a ring-shaped isolating etch trench. The conductivity of the core is provided by in-diffusion of dopants from a highly-doped layer deposited along sidewalls of the core within the etched trench. The highly-doped layer used as the diffusion source can be either conductive or insulating, depending upon the application. The highly-doped diffusion source layer can be retained after diffusion to further contribute to the conductivity of the TSV, to help fill or seal the via, or can be partially or completely removed. Embodiments provide for the drive in-diffusion process to use a same heating step as that used for thermal oxidation to fill or seal the via trench. Other embodiments can provide for diffusion elements from a gaseous source.