The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2016

Filed:

May. 07, 2014
Applicants:

Kanamori Kohji, Seoul, KR;

Young-woo Park, Seoul, KR;

Jin-taek Park, Hwaseong-si, KR;

Jae-duk Lee, Seongnam-si, KR;

Inventors:

Kanamori Kohji, Seoul, KR;

Young-Woo Park, Seoul, KR;

Jin-Taek Park, Hwaseong-si, KR;

Jae-Duk Lee, Seongnam-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 27/115 (2006.01); H01L 29/66 (2006.01); H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02672 (2013.01); H01L 21/02532 (2013.01); H01L 21/28282 (2013.01); H01L 27/11582 (2013.01); H01L 29/66833 (2013.01); H01L 29/7926 (2013.01);
Abstract

Methods of fabricating a vertical cell semiconductor device including forming a hole passing through a stacked structure of alternating insulating and sacrificial layers on a substrate, forming an amorphous silicon layer conforming to an inner wall of the hole, forming a silicon region on the amorphous silicon layer, and metal induced crystallizing the amorphous silicon layer via the silicon region to form a single-crystalline channel structure in the hole.


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